Making CSB+-Tree Processor Conscious

Research output: Chapter in Book/Report/Conference proceeding › Book chapter › Research

Standard

Making CSB+-Tree Processor Conscious. / Samuel, Michael; Pedersen, Anders Uhl; Bonnet, Philippe.

First International Workshop on Data Management on New Hardware. 2005.

Research output: Chapter in Book/Report/Conference proceeding › Book chapter › Research

Harvard

Samuel, M, Pedersen, AU & Bonnet, P 2005, Making CSB+-Tree Processor Conscious. in First International Workshop on Data Management on New Hardware.

APA

Samuel, M., Pedersen, A. U., & Bonnet, P. (2005). Making CSB+-Tree Processor Conscious. In First International Workshop on Data Management on New Hardware

Vancouver

Samuel M, Pedersen AU, Bonnet P. Making CSB+-Tree Processor Conscious. In First International Workshop on Data Management on New Hardware. 2005

Author

Samuel, Michael ; Pedersen, Anders Uhl ; Bonnet, Philippe. / Making CSB+-Tree Processor Conscious. First International Workshop on Data Management on New Hardware. 2005.

Bibtex

@inbook{1e8fb1e074c311dbbee902004c4f4f50,
title = "Making CSB+-Tree Processor Conscious",
abstract = "Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL{\textquoteright}s heap storage manager.",
keywords = "Faculty of Science, storage management, cache conscious processing",
author = "Michael Samuel and Pedersen, {Anders Uhl} and Philippe Bonnet",
year = "2005",
language = "English",
booktitle = "First International Workshop on Data Management on New Hardware",

}

RIS

TY - CHAP

T1 - Making CSB+-Tree Processor Conscious

AU - Samuel, Michael

AU - Pedersen, Anders Uhl

AU - Bonnet, Philippe

PY - 2005

Y1 - 2005

N2 - Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL’s heap storage manager.

AB - Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL’s heap storage manager.

KW - Faculty of Science

KW - storage management

KW - cache conscious processing

M3 - Book chapter

BT - First International Workshop on Data Management on New Hardware

ER -

ID: 86967